Design template for EBL - Revision history

Harry: Harry moved page Design template for lithography training to Design template for EBL

2026-04-14T07:57:42Z

Harry moved page Design template for lithography training to Design template for EBL

← Older revision	Revision as of 07:57, 14 April 2026
(No difference)

Harry: /* Design requirements */

2026-02-18T13:42:48Z

Design requirements

← Older revision		Revision as of 13:42, 18 February 2026
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	* Include at least 4 alignment marks, each at the corner of your chip		* Include at least 4 alignment marks, each at the corner of your chip
	* Include a vernier pattern to test the alignment accuracy of the tool		* Include a vernier pattern to test the alignment accuracy of the tool.
	* The design should be in gds or dxf format		* The design should be in gds or dxf format
	* Your design will have two layers: one for session 2 and one for ~~session~~ 3		* Your design will have two layers: one for session 2 and one for ''Session 3''
	* Contain your design in an area of 600x1200 μm2		* Contain your design in an area of 600x1200 μm2
	* Lines can have a width of a minimum ~~60nm~~ up to 2 μm		* Avoid placing your design in the centre of the chip (ie break the symmetry). This will make it easier for you to identify the correct orientation when loading ''Session 3''
			* Lines can have a width of a minimum 60 nm up to 2 μm
	* The complete exposure shouldn't take more than 90 mins		* The complete exposure shouldn't take more than 90 mins
	* Most importantly, let your creativity be free. You can use images transformed in gds.		* Most importantly, let your creativity be free. You can use images transformed in gds.

Harry: /* Introduction */

2026-02-17T17:27:26Z

Introduction

← Older revision		Revision as of 17:27, 17 February 2026
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	=Introduction=		=Introduction=
			[[Image: design_phidl.png\|thumb\|Recommended design on phidl]]
	We recommend using a combination of the following tools for designing devices:		We recommend using a combination of the following tools for designing devices:
	* Klayout or CleWin (only for Windows)		* Klayout or CleWin (only for Windows)

Harry: /* Design requirements */

2026-02-17T17:22:11Z

Design requirements

← Older revision		Revision as of 17:22, 17 February 2026
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	=Design requirements=		=Design requirements=
			The chips provided from the cleanroom are usually 10x10mm2, so the design should be inside this area
			You are welcome to use the provided code and explore different possibilities on your own.

			As a baseline, please follow the guidelines:

			* Include at least 4 alignment marks, each at the corner of your chip
			* Include a vernier pattern to test the alignment accuracy of the tool
			* The design should be in gds or dxf format
			* Your design will have two layers: one for session 2 and one for session 3
			* Contain your design in an area of 600x1200 μm2
			* Lines can have a width of a minimum 60nm up to 2 μm
			* The complete exposure shouldn't take more than 90 mins
			* Most importantly, let your creativity be free. You can use images transformed in gds.

Harry at 17:14, 17 February 2026

2026-02-17T17:14:55Z

← Older revision		Revision as of 17:14, 17 February 2026
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			=Introduction=

	We recommend using a combination of the following tools for designing devices:		We recommend using a combination of the following tools for designing devices:
	* Klayout or CleWin (only for Windows)		* Klayout or CleWin (only for Windows)
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	* design_template.ipynb		* design_template.ipynb
	* layer1_training.ftxt ''BEAMER file for elionix 100keV with 500pA''		* layer1_training.ftxt ''BEAMER file for elionix 100keV with 500pA''

			=Design requirements=

Harry at 17:12, 17 February 2026

2026-02-17T17:12:14Z

← Older revision		Revision as of 17:12, 17 February 2026
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	We recommend using a combination of the following tools for designing devices:		We recommend using a combination of the following tools for designing devices:
	; Klayout or CleWin (only for Windows)		* Klayout or CleWin (only for Windows)
	; [Phidl] (python-based)		* [[Phidl]] (python-based)
	; Copilot (great tool to boost your productivity)		* Copilot (great tool to boost your productivity)

			There is a code you can use as a basis to build the design for your EBL trainings.

			You can find them on <code>N/SCI-NBI-Cleanroom/Elionix100 EXP files/general Training</code>.
			* CR_template_training.gds ''design with alrignment marks and vernier patterns (~27mins exposure time)''
			* design_template.ipynb
			* layer1_training.ftxt ''BEAMER file for elionix 100keV with 500pA''

Harry: Created page with "We recommend using a combination of the following tools for designing devices: ; Klayout or CleWin (only for Windows) ; [Phidl] (python-based) ; Copilot (great tool to boost your productivity)"

2026-02-17T17:01:13Z

Created page with "We recommend using a combination of the following tools for designing devices: ; Klayout or CleWin (only for Windows) ; [Phidl] (python-based) ; Copilot (great tool to boost your productivity)"

New page

We recommend using a combination of the following tools for designing devices:
; Klayout or CleWin (only for Windows)
; [Phidl] (python-based)
; Copilot (great tool to boost your productivity)